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Tuesday, January 29, 2008

IBM to Buy AMD? Seems Unlikely, But an Interesting Idea

Published: January 28, 2008

by Timothy Prickett Morgan

A few weeks ago, when I was complaining that Big Blue needed to rationalize its product names, I quipped that IBM could start making its own Opteron processors just so it could call its X64-based servers the System/x6 line and then make it match the System/p6 Power servers and System/z6 mainframes. I was joking, but a report in the Financial Times last week suggested that IBM and Advanced Micro Devices might be thinking of merging their processor businesses.

These kinds of rumors come around the IT industry as much out of speculation and idleness on the part of the analysts at the big IT consultancies and brokerage houses, not to mention bored editors at the IT trade rags. I didn't start such a rumor, and I don't know who did, but the FT story in its MergerMarket report is doing exactly what all of us in the press and analyst community are doing right now: using the rumor as a means to examine the possibility.

"Advanced Micro Devices and IBM may establish a more formal semiconductor tie-up than their current partnership, speculated industry sources and analysts in conversations with MergerMarket," the report said, which you can read here. A deal could see IBM's Microelectronics division merge with AMD at some point, possibly in the near term, said the sources."

That sure doesn't sound like the FT has any hard information that such a deal is under way.

IBM is, of course, no stranger to making X86 servers and it is an expert in making complex, low-volume processors with advanced processes. When IBM picked Intel as its chip partner for the original PC way back in 1980, it licensed Intel's chip designs and retained the rights to manufacture clone chips, which it did for many years for its own machinery. The reason why IBM did this is to keep its chip factories--often called fabs--warm. The price of a chip is inversely related to the volume coming out of the factories, and the fab doesn't care what instruction sets are being etched onto the silicon. IBM correctly ran X86, proprietary CISC, Power, and mainframe processors through its fabs, side by side, for many years. And the embedded PowerPC market, which has been a good market for IBM (including game consoles) helps the company cover the costs of making its own Power6 and z6 mainframe processors today. Running Opteron processors through the East Fishkill fab, where IBM is getting 45 nanometer technologies ready, makes more sense than not doing it.

AMD is already one of IBM's key partners in the development of future chip making technologies because of the prowess that Big Blue has in the microelectronics area. AMD is a licensee of IBM's chip-making and chip-packaging technologies, too, and has been for some time. IBM was, you will remember, the first tier-one server vendor to step up to the plate and endorse the 64-bit Opteron processor, and was followed by Sun Microsystems, Hewlett-Packard, and Dell, in that order. (HP is by far the Opteron server volume leader.) The funny bit is that a lot of the key techies who helped create IBM's Power RISC processors are now working at AMD, with the most important one being Phil Hester, AMD's chief technology officer. (Hester was also a founder of Opteron server pioneer Newisys, which gave Sun its initial two-socket and four-socket Opteron servers but never could get its larger iron into the field based on the "Horus" chipset.) I also have this sneaking suspicion--which has no basis in fact--that IBM would love to have a single processor socket, interconnection, and motherboard design for its various processors, and owning AMD would mean it could consolidate future Power7 and z7 cores into processors that use HyperTransport technology and plug into Opteron sockets.

A marriage between IBM and AMD could make perfect sense if IBM believed that it could more profitably make chips than it and AMD currently do separately; this would almost certainly involve the selling off of some of its own fabs or those of AMD. It would also make sense if IBM wanted to make all of the chips that are sold in its platforms, top to bottom, and if Big Blue thought it would give it a competitive edge. Buying AMD would give IBM a chance to win back Apple Computer's PC and server chip business, which IBM lost two years ago when Apple jumped to Intel processors.

The thing is, though, IBM has sold off so many commodity businesses--low-end printers, telecom and network equipment, disk drives, PCs, and high-end printers, just to name a few--that it is hard to believe that IBM would want to enter the brutal X64 processor market. If this rumor pans out--which seems highly unlikely--IBM could be thinking even more radically than consolidating down to one socket. It could be envisioning a world where it is down to a single set of server motherboards and server designs and a single, virtualized environment that supports Windows, Linux, AIX, i5/OS, and z/OS natively on X64 processor cores. This seems highly unlikely, but possible--particularly if IBM pulls an Apple and does some of the job by using emulation technology from Transmeta, which made Apple's jump from IBM and Motorola PowerPC to Intel Core processors as smooth as silk. Much to the surprise of many IT industry watchers.

Still, as interesting as all of these ideas are, IBM's recent purchase of business intelligence software maker Cognos, its biggest deal since the acquisition of groupware maker Lotus back in 1995, is not indicative of the kinds of acquisitions IBM likes to do these days. IBM likes to buy obscure, innovative companies just as they are getting ready to get some traction in the market, building out its arsenal of products and services. Going deeper into the commodity hardware business cuts against this strategy in a big way. And with IBM owning AMD, you can bet HP, Sun, and Dell would not emphasize their Opteron-based products and would push their Xeon-based servers even harder than they are now doing, thanks to AMD's delays in delivering its quad-core "Barcelona" Opterons.

As we go to press on Friday, AMD has a market capitalization of $4.2 billion, and even though it is generating roughly $6 billion a year in sales, it is not profitable. In early 2006, when Intel was still getting its Core architecture act together, AMD had a market capitalization that was nearly six times as high, but it was never much good at generating profits. That valuation that Wall Street put on AMD was more an indicator of how far Intel had fallen behind as much as the promise for future profits that AMD could have if Intel continued to screw up. (As you know, Intel got its act together, put in 64-bit memory extensions, and goosed up its laptop chips to make a new desktop and server chip line that competes well with Opterons.) AMD has $1.9 billion in cash and equivalents, so just absorbing AMD at current market cap rates would only cost IBM around $2 billion while adding perhaps $5 billion to $6 billion to its top line (how much depends on whether AMD's partners care that IBM owns it). With cost cuts, the deal might now be a financial disaster for IBM.

But I still think it is equally likely that IBM might spin out its Microelectronics division and merge it with AMD as it is likely that IBM would acquire AMD. Given IBM's history and its frustrations in the hardware business, it seems more plausible that Big Blue would pull a play out of the Sun Microsystems' playbook, becoming a designer of chips but not a manufacturer and farming out the manufacturing jobs to contractors. No matter what, you can bet IBM will keep making machines based on Power and mainframe processors for many years to come. That much is not going to change quickly, and this is what matters to customers who use these machines.

posted by OttoKee  # 8:43 PM

IBM Readies Quad-Core z6 Chip for Mainframe Iron

Published: October 30, 2007

by Timothy Prickett Morgan

Word has leaked out about IBM's future mainframe processors, which are going to be called the z6 processors to match the nomenclature of the Power6 family of Power-based processors that Big Blue is weaving into the System i and System p machines. The System z mainframes are going to get a lot more processing oomph and other goodies pulled over from the Power6 processors, as it turns out. Information about the future z6 processors might be one of the reasons why mainframe sales took a hit in the third quarter.

According to documents received by IT Jungle concerning the z6 processor, the chip will be IBM's first native quad-core chip, packing four cores onto a single die and giving each of them 3 MB of L2 cache memory on the chip. Like prior mainframe processors, the z6 chip will have data compression and cryptographic functions on the chip, and will include the new decimal floating point units that made their debut in the Power6 RISC processors that were announced this summer for the System p and System i lines. (Decimal units do so-called "money math" natively, not with a software overlay on existing integer math units in the chip.) Each core on the quad-core z6 chip has 64 KB instruction and 128 KB data L1 caches, plus a binary/hexadecimal floating point, fixed point, and decimal floating point unit. There are two compression and cryptographic accelerators on the chip, shared by a pair of processor cores.

The future z6 chip implements the IBM mainframe instruction set in 24-bit (System/360), 31-bit (370/XA), and 64-bit (z/Architecture) modes. The chip is not, as many had rumored a part of IBM's "Project Eclipz" convergence of its high-end server lines, simply a Power6 chip with some mainframe window dressing thrown on. The z6 chip has 894 mainframe CISC instructions (with 668 of them implemented in hardware), and supports PR/SM logical partitioning and z/VM instances with assistance from the chip. The pipeline in the z6 cores has been completely redesigned and streamlined to allow IBM to crank up the clock speeds on the unit to 4 GHz and higher, and IBM has also added 50 new instructions to the z6 chip that help compiled mainframe applications run faster.

Like prior and current generations of Power processors from IBM, the z6 chip includes the electronics to link up multiple processors into symmetric multiprocessors on the chip itself, which means IBM will be able to relatively easily link these chips into very large processor complexes. The z6 processor will be married with an SMP hub chip that has 48 GB/sec of bandwidth and which has 24 MB of SRAM L3 cache on it. IBM is not yet saying how far it can scale the z6 servers that will use the z6 processor and the SMP hub chip, but it seems likely that a minimum of 16 of these units will allow up to 64 z6 cores to be presented to applications in a single system image for z/OS. That SMP hub chip has a stunning 1.6 billion transistors and a total of 7,984 pins. The SMP hub chips can be paired up in a system, which suggests IBM might be offering pairs for scalability (perhaps pushing cores in the machine up to a maximum of 128) or for reliability (maybe even mirroring processors in the system, which would be an interesting development). IBM's goal is to have mainframes never go down, and mirroring processors would certainly help accomplish this. Each z6 chip has two 48 GB/sec SMP hub ports, four 13 GB/sec memory ports, and two 17 GB/sec I/O ports.

The z6 chip will have 991 million transistors and has 138 MB of SRAM on the die in total. The chip has 1,199 signal pins and a total of 8,765 pins and a die size of 21.7 millimeters by 20 millimeters. Like the Power6 chip, the z6 mainframe chip is implemented in IBM's 65 nanometer SOI chip processes, and like the Power6 chip, the pipeline has been reworked to do instructions mostly in order at a low latency, allowing clock speeds to rise to boost performance of applications. Other chip makers have decided to preserve their pipelines, keep the clock speeds low, and add multiple cores to get the throughput of a chip up where Moore's Law can take it. With the Power6 and z6 chips, IBM is trying to stay within the same thermal envelope and allow clock speeds to rise as high as it can push them.

If the Power6 is any guide, then the z6 mainframe processors should offer considerably more performance than their z9 EC predecessors, but not as much as the higher clock speed might lead you to believe. The dual-core z9 EC chip ran at 1.7 GHz and each core delivered around 580 MIPS of performance (the EC Model 701) and an aggregate of 17,800 MIPS in a 54-processor EC Model 754 machine. The clock speed change to 4 GHz and higher and the pipeline shift might yield somewhere around a 50 percent raw performance increase per core, and the radically redesigned SMP hub approach (which is not part of the Power6 machines, at least not yet) could make the machines scale a lot more efficiently and support a lot more main memory as well. So we might be looking at z6 cores with mainframe engines rated around 875 MIPS to 900 MIPS, and if IBM can efficiently push up the core count and get more work out of it, the box could deliver a lot more aggregate MIPS. The current System z9 EC box lets around 43 percent of the aggregate MIPS go up the chimney with its SMP implementation, and just reducing that SMP overhead to 35 percent for a 64-core z6 system would yield a mainframe with around 36,000 MIPS of performance.

A decade ago, when IBM was shipping G4 mainframe engines running at 300 MHz, the 9672 mainframes had a top-end engine speed of around 63 MIPS and a scalability of ten engines with a total usable MIPS of 447 MIPS. IBM has gradually ramped up mainframe processor clock speeds, hitting 420 MHz in 1998 with the G5s, 550 MHz in 1999 with the G6s, and 770 MHz with the z900 processors in 2000. Those "T-Rex" mainframes sported IBM's first dual-core mainframe processors, although the company did not say this at the time. (Only half of the processors in a given T-Rex box had both cores working because yields were so low on these chips.) In 2003, with the z990 machines, IBM went to full dual-core processors and boosted clock speeds to 1.2 GHz at the same time, and in 2005, the z9 EC machines launched with dual-core 1.7 GHz chips.

IBM is not yet saying when the z6 chip will be ready for market or when the systems employing this z6 chip will be generally available. Based on the recent stall in mainframe sales, it is reasonable to guess that IBM will try to get the mainframes using the z6 chips to market in early 2008. There has been no talk of seeing these processors or the machines that use them any time this year.


posted by OttoKee  # 8:09 PM

IBM Previews Future z/OS, z/VM Mainframe Operating Systems

Published: February 13, 2007

by Timothy Prickett Morgan

A very large portion of IBM's sales and an even larger share of its profits still come from the mainframe base, and the company can't just sit around collecting cash. Mainframe shops are among the most demanding server users in the world--which is understandable given the high cost of these machines--and Big Blue has to update the software from time to time to give it new functionality. This week, IBM is previewing a set of software upgrades for the mainframe that will come out in stages throughout 2007.

IBM is making the announcements at the SHARE mainframe user group meeting, which is happening in Tampa, Florida, this week.

The two biggest announcements concern future releases of two key mainframe operating systems, z/OS V1.9 and z/VM 5.3. The z/OS operating system was previously known as MVS and OS/390 during the previous mainframe generations. Whenever IBM updates z/OS, it is an exercise in alphabet soup reading that would strain the patience of a scribe. The main thing is that IBM is updating z/OS, which is the key platform for supporting transaction processing systems and batch systems on mainframes, based on feedback from customers. And then IBM decides what current iron the software will run on, which will affect the hardware upgrades that customers will have to plan for in the future.

z/OS V1.9 will be delivered in September, and it will run on the current System z9 Business Class (BC) and Enterprise Class (EC) servers, which roughly correspond to midrange and high-end servers in terms of raw performance. The software will also be supported on two prior generations of midrange gear--the zSeries 800 and 890--and on two prior generations of high-end mainframes--the zSeries 900 and 990 boxes. That means any mainframe that dates prior to 2000 cannot run z/OS V1.9.

The big enhancement coming with z/OS V1.9 is that software scalability is going to catch up with hardware scalability. Prior releases of z/OS could only have a logical partition that spans 32 processors (mainframes have a logical machine hypervisor by default, not as an afterthought), even though the largest System z9 EC mainframes have 54 processors. With z/OS 1.9, the operating system will now be able to have a single partition span all the processors in the box, which means that all of the processing capacity of the biggest System z9 machine--as well as its main memory and I/O--can be brought to bear on a single workload, such as supporting a DB2 relational database. That processor count in a single image includes any special zAAP Java co-processors or zIIP DB2 database co-processors.

z/OS V1.9 will also include improvements to the integrated Unix runtime environment inside of mainframes, which is called z/OS Unix System Services, which IBM hopes will make it easier to port Unix applications to run on mainframes. IBM is tweaking the related Unix File System for z/OS to make it more resilient and to hook into Parallel Sysplex clusters better. IBM is also tweaking its WebSphere development tools so an Eclipse-based graphical user interface can be used to debug compiled System z applications; a new XL C/C++ compiler is also coming out with the updated mainframe operating system, which can compile to native z/OS or the Unix services embedded within z/OS. The TCP/IP stack in z/OS V1.9 will now include policy-based routing of network traffic, and the workload manager in the operating system will also now have policies that better manage workload contention when machines are near 100 percent CPU utilization. This would be a very bad condition for most servers, but on a mainframe, CPU saturation is a goal that is often attained.

To help mainframe shops plan their software and hardware upgrades better, IBM said that it would continue its practice of supporting a z/OS release for three years after its general availability. The company also said that it would keep two prior releases under support as each new release comes to market. So, for instance, z/OS V1.9 will still be supported when z/OS V1.11 comes out years hence, and so will z/OS V1.10. IBM stopped selling z/OS V1.7 in October 2006, but customers can still buy support for it. z/OS V1.8 is the current release. z/OS V1.4 and z/OS 1.5--including the trimmed-down, e-business variants for smaller mainframes, z/OSe V1.4 and z/OSe V1.5--will have their support service cut off on March 31.

z/OS V1.6 gets its support cut off on September 30. IBM also said that z/OSe V1.8 would be the last such lower cost z/OS it brings to market, which will only be available through October of this year; the regular V1.8 software will be removed from the IBM mainframe catalog then, too.

z/VM is an operating system in its own right, of course, but early editions of this software were used by mainframe shops much as virtual machine hypervisors are used on X64 and Unix servers today. The VM platform was for a long time the only way to host multiple and incompatible operating systems on a single mainframe. IBM also has an alternative way to slice up mainframes, called logical partitioning, which was often used in conjunction with MVS and its follow-ons and assisted by special hardware features to run better than it might otherwise. Logical partitions were delivered to help customers avoid having to buy VM and to help with mainframe data center consolidations two decades ago. But VM matured into a platform for supporting certain kinds of workloads, such as Linux instances for infrastructure and application serving, because it allows a mainframe to be chopped into very thin but highly utilized slices.

The reason why z/VM is still used is obvious once you review some statistics. According to IBM, using logical partitioning, a top-end System z9 EC mainframe can only support 60 logical partitions and a zSeries 990 can only support 30 partitions. But a z/VM machine running benchmarks in IBM's labs has been testing hosting more than 1,000 real Linux operating system instances. A System z9 BC machine can host about 600 Linux instances, according to IBM. That is a big improvement from the few dozen Linux images that VM could support five years ago.

IBM has contended for years that it costs less money to run a set of Linux instances on a mainframe over a set time period than it does to buy lots of cheap X86 or X64 servers and put Linux on them. With z/VM V5.3, due at the end of June this year, IBM will push the limits of partition scalability out a little further, allowing a single z/VM instance to span 32 processors in a mainframe, up from 24 processors.

With that 33 percent increase, now a larger block of CPU, memory, and I/O capacity can be allocated to a conglomeration of Linux instances. That means a couple of different things. First, each Linux instance can have more capacity allocated to it, should the workloads demand it. (Dynamic resource allocation is done automatically by z/VM, incidentally. This is the only way to keep a system running at close to peak performance, as Linux, Windows, and Unix platforms providers are learning as they retread the ground mainframe shops went over a decade ago when they virtualized.) The increased CPU scalability of z/VM V5.3 also means that customers with modest Linux instances can add more instances to a box. That means more efficient use of the mainframe, fewer z/VM licenses, and fewer outboard X64 servers.

To balance that expanded scalability, IBM is committing with z/VM V5.3 to go beyond the current 128 GB main memory limit of z/VM V5.2. The company is not saying how much more memory it can add into the operating system just yet. The memory management features in z/VM V5.3 will also know how to take advantage of special memory support in the z/VM Control Program--what we would call a hypervisor today--that makes memory paging more efficient on Linux instances running on z9 BC and z9 EC servers.

z/VM V5.3, like prior V5 releases, only runs on 64-bit mainframe iron. That means it is restricted to the current z9 BC and EC boxes, and the prior zSeries z990, z900, z890, and z800 servers.


posted by OttoKee  # 8:04 PM

Sunday, January 27, 2008

Mainframe Catalogs: the untold story

By Philip Howard, Bloor Research More by this author
Published Wednesday 15th December 2004 11:49 GMT

On a Windows PC everything goes through the Registry: whenever you want to run an application the registry has to be referenced. This is, in simple terms, exactly what a catalog does under MVS or z/OS: all datasets are accessed via an ICF catalog.

However, there are two big differences between a catalog and the Windows registry. The first is that mainframes are supposed to support high availability 24x7 environments, while PCs are not. The second thing is that you can have multiple catalogs on a mainframe.

But there is one more similarity between a registry and a catalog: they both get damaged and they both break. Worse, catalogs are breaking more and more often. And, even worse than this, most companies are not even aware of the problem - very few companies consider catalogs when they build disaster recovery plans, for example, and they are leaving themselves exposed to very serious potential consequences if they do not.

There are several underlying reasons for this problem. The first is that you cannot, using IBM's native facilities, re-distribute datasets across catalogs without taking the original catalog down for a prolonged period, which most companies cannot afford to do. Moreover, though IBM does provide the ability to split catalogs, it can only do this if the catalogs are clean. But, in order to ensure that catalogs are clean you need a diagnostics facility that will generate fixes for you.

The result of all this is that it is very rare for companies to create new catalogs and, even when they do, the majority of datasets still go through the first of those catalogs. Indeed, it is typical for tens and even hundreds of thousands of datasets to be going through a single catalog.

This creates problems of its own: a greater and greater strain is placed on the catalog, particularly for shared access requirements, control blocks and so on, which are being accessed by more and more applications. Further, performance is suffering (IBM never designed catalogs for these sorts of volumes) and IBM has been forced to introduce new code to enhance catalog performance, which is a threat in its own right.

Now, as I have stated, many companies are not even aware that this is a problem and, potentially, a very serious one. However, there are tools that are available that allow you to do on-line dataset re-distribution, split catalogs, diagnose and fix catalogs, and analyse the structural content of catalogs (which you need in order to help decide dataset re-distribution) and advanced back-up and recovery (IBM provides basic forward recovery capability).

The leading vendor in this space today is Mainstar, with its Catalog RecoveryPlus product. This has some 200 users world-wide and Ron Ferguson, the company's CEO, is the co-author of IBM's Red Book on this subject. However, you probably haven't heard of Mainstar because they haven't been big on marketing (at least outside the US). However, the company now feels that it really needs to be bring attention to the problem of catalog breakage to the wider market, as it poses such a threat to all mainframe-based high availability systems.


posted by OttoKee  # 7:09 AM

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